Biography: Meenal was born in Pune, India in 1980. She received her B.Tech degree in Computer engineering from Dr. Babasaheb Ambedkar Technological University, Maharashtra, India in 2002, the M.Tech. degree from Uttarakhand technical University, Uttarakhand, India in 2012, and completed the Ph.D. degree from Ansal University in 2017, both in computer science and engineering. Since 2002, she has been in teaching profession and has worked with many leading engineering colleges in India. Meenal is a certified course designer and assessor; and develops courses for working professionals. Her current research interests include interconnection networks, parallel and distributed computing, and Big Data.
Speech Title: On Mathematical and Simulation based modeling of Gamma Interconnection Networks family for their implementation in Parallel and Distributed computing environment
Abstract: This research aims to present the un-explored characteristics of Gamma Interconnection Networks(GINs), like, permutation realization, topology mapping, applicability in Network-on-Chips and implementation of parallel and distributed algorithms, etc. As the title of the speech indicates, the work carried out in various areas, was represented using Mathematical notations and was simulated to support the observations of the study. In this research work, 3 GIN variants were proposed, which were found efficient in permutation networks, parallel sorting and Networks on Chips. This study solved the unique problem of realizing Bit Reversal Permutation in a single pass on any size of GIN. A Modified Control Algorithm was proposed for permutation realization on a new GIN variant, namely “GIN with alternate source”. The algorithm was designed in such a way that, it can be easily implemented on the majority of the GIN variants and can implement frequently used permutations. During the study and implementation of parallel algorithms, it was observed that, some of the multistage interconnection network topologies are popularly used in parallel and distributed systems. If an interconnection network can inhibit the working characteristics of these popular networks, then that network’s usability enhances. This fact acted as the motivation, to check such mapping/embedding of famous topologies on to GIN and its variants. The ability of GIN to work with alternate or redundant paths easily enabled these mappings. The inherent routing algorithms were found to be efficient to embed these topologies. Network-on-chip(NoC) is the most happening research area, where the interconnection networks form the communication backbone for multiple processing elements fabricated on a single chip. None of the GIN variants have been used as NoC interconnect. A new network variant named NoCGIN was proposed, which can connect multiple cores to each other. Overall this research study presents the work related to GINs and their applicability in Sorting Algorithms, Permutation realization, Topology mapping and NoC interconnect. The study also tries to demonstrate the effects of various connection patterns on path availability.